This disclosure relates to a semiconductor device and more particularly, to a semiconductor device of initializing data stored in a complementary cell typed non-volatile semiconductor memory.
For example, Japanese Unexamined Patent Application Publication No. 2008-117510 relates to a semiconductor memory and discloses a non-volatile semiconductor memory of a pair type of memory cells (complementary cell). A control circuit of the semiconductor memory writes the complementary data respectively in the both memory cells forming the complementary cell. A differential sense amplifier amplifies a potential difference read from the both memory cells and reads the data stored in the complementary cell. The control circuit initializes the data stored in the complementary cell. The threshold voltages of the both initialized memory cells are substantially equal. In such a conventional device, the differential sense amplifier cannot determine which threshold voltage is higher in the memory cells, due to the initialization of the data; as the result, the data of the complementary cell gets unsteady.